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Clock Circuits
Clocks: #-A B-C D-G H-O P-S T-Z

Last Updated on: Wednesday, June 02, 2021 04:22 AM

Circuits Designed by Dave Johnson, P.E. :

Closet Light with Automatic 3-Minute Timeout - The circuit below is powered by three 1. 5v alkaline AA cells. With a finger tap to the pushbutton trigger switch, a cluster of 6 wide angle white LEDs is turned on. The lights remain on for about 3 minutes, then will turn off. The circuit’s standby current is only a few microamps. A set of fresh batteries should last at least 200 light applications. The circuit uses a Schmitt trigger inverter and two transistors. When the pushbutton switch S1 is pressed, the 10uF capacitor C1 is discharged . . . [Circuit by David A. Johnson P.E., 11/14/10]
Computer, Long Period, Watch Dog Timer - This circuit uses a simple 4060 IC oscillator/timer that is reset periodically by a computer. Should the computer fail to send a pulse, the output changes state. The time can easily be set from seconds to hours . . . [Hobby Circuit designed by Dave Johnson P.E., 01/01/98]
Count Cars with Laser - This is an illustration how a laser could be used to count traffic and measure the speed of each car passing through the sensor area . . . [Hobby Circuit designed by David Johnson P.E., 01/07/07]

Links to electronic circuits, electronic schematics and designs for engineers, hobbyists, students & inventors:

Clock Design using the PIC16c54 for LED Displays & Switch Inputs - Application Note Published 26-Aug-97. . . [Microchip]

Clock Fail Circuit Switches to Alternate Clock - 10/24/96 EDN Design Idea A common design need is to detect the presence or absence of a clock signal. In the absence of a clock, it may be necessary to switch to an alternate clock or to at least notify the system that a failure has occurred. The circuit. . . [by Rick Downs, Dallas Semiconductor, Dallas, TX]

Clock multiplier circumvents PLL - 05/13/99 EDN Design Idea Using a standard PLL circuit, such as the CMOS 4046B with some passive components, is a wellknown way to design a clock multiplier. Unfortunately, using a PLL in a digital circuit has two disadvantages: It takesPDF contains many . . . [by Jose Carlos Cossio, Santander, Spain]

Clock Pulse Generator - For many years the author has been approached by people who have managed to lay hands on an ‘antique’ electric clock and need an alternating polarity pulse driver. This is immediately followed. must register on this site. . . [Published in Elecktor July/Augu, 2010]

Clock Recovery PLL Fits into Single PLD - 11/23/95 EDN Design Idea ynchronous serial protocols, HDLC, for example, require that you synchronize the transmitter and the receiver. Sometimes, this synchronization requires an extra wire to carry the serial clock. However, many serial-communication ICs can save this wire thanks to an internal PLL clock-recovery circuit that reconstructs a clock signal phase-locked to the serial data stream. . . . [by Ricardo Monleone, AGIE Ltd, Losone, Switzerland]

Clock Recovery Scheme Suits Low Snr Systems - 06/05/00 EDN Design Idea (PDF Contains many designs, scroll to find this one) A clock-recovery architecture can operate with NRZ digital signals, even at low SNRs. A clock-recovery subsystem is based on a PLL comprising a phase comparator, a loop filter, and a voltage-controlled oscillator (VCO) . . . [by Luis Miguel Brugarolas, SIRE, Madrid, Spain]

Clock Switching Circuit Banishes Glitches - 12/19/96 EDN Design Idea Many of today's digital systems require multiple clock domains as well as the ability to switch between them on the fly without producing glitches. Listing 1 consists of synthesizable VHDL code for such a circuit. In the circuit, . . . [by Alex Sumarsono, Bay Networks Inc, San Jose, CA]

Clock with Timer & Solar Panel Regulator - This is a combination clock timer and solar panel charge controller used to maintain a deep cycle battery from a solar panel. The timer output is used to control a 12 volt load for a 32. . . [by Bill Bowden]

Clock-Recovery PLL Fits Into Single PLD - 11/23/95 EDN Design Idea erial-communication ICs can save you from using an extra wire thanks to an internal PLL clock-recovery circuit that reconstructs a clock signal phase-locked to the serial data stream. . . . [by Ricardo Monleone, AGIE Ltd, Losone, Switzerland]

Clock-recovery scheme suits low-SNR systems - 06/05/00 EDN Design Idea A clock-recovery architecture can operate with NRZ digital signals, even at low SNRs. A clock-recovery subsystem is based on a PLL comprising a phase comparator, a loop filter, and a voltage-controlled oscillator (VCO]PDF Contains. . . [by Luis Miguel Brugarolas, SIRE, Madrid, Spain]

Closet Light with Automatic 3-Minute Timeout - The circuit below is powered by three 1. 5v alkaline AA cells. With a finger tap to the pushbutton trigger switch, a cluster of 6 wide angle white LEDs is turned on. The lights remain on for about 3 minutes, then will turn off. The circuit’s standby current is only a few microamps. A set of fresh batteries should last at least 200 light applications. The circuit uses a Schmitt trigger inverter and two transistors. When the pushbutton switch S1 is pressed, the 10uF capacitor C1 is discharged . . . [Circuit by David A. Johnson P.E., 11/14/10]

Computer, Long Period, Watch Dog Timer - This circuit uses a simple 4060 IC oscillator/timer that is reset periodically by a computer. Should the computer fail to send a pulse, the output changes state. The time can easily be set from seconds to hours . . . [Hobby Circuit designed by Dave Johnson P.E., 01/01/98]

Count Cars with Laser - This is an illustration how a laser could be used to count traffic and measure the speed of each car passing through the sensor area . . . [Hobby Circuit designed by David Johnson P.E., 01/07/07]

Coupling a Single-Ended Clock Source to the Differential Clock Input of Third-Generation TxDAC® & TxDAC+® Products - AN-642 Analog Devices App Note. . .

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Clocks: #-A B-C D-G H-O P-S T-Z