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Behind the Switch Symbol - AN-355 Analog Devices Application
Notes (app note added 2/06)Use CMOS Analog Switches More Effectively
When You Consider Them as Circuits
Clock multiplier circumvents PLL - 05/13/99 EDN-Design
Ideas.....Using a standard PLL circuit, such as the CMOS 4046B with some
passive components, is a wellknown way to design a clock multiplier.
Unfortunately, using a PLL in a digital circuit has two disadvantages: It
takes.....PDF contains many circuits, scroll to find this one.…[Jose
Carlos Cossio, Santander, Spain]circuit has two disadvantages: It
takes.....PDF contains many circuits, scroll to find this one.… [Design
Idea by Jose Carlos Cossio, Santander, Spain]
Frequency Multiplier Improves Line Readings - 03/26/98 EDN-Design
Ideas.....Because of the low frequencies involved, accurately measuring line-frequency
variations is complicated. When you use an ordinary frequency counter with a 1-sec
gate time, the reading would be 59, 60, or 61 Hz. To obtain 0.01-Hz accuracy, you must
increase..... [Design Idea by Yongping Xia, Teldata Inc, Los Angeles, CA]
Gyrator Circuit - The gyrator principle uses the effect that the value of
input capacitance at the base of a transistor is effectively multiplied by the current
gain of the transistor…. [Circuit design by Andy Collison]
Two Diode Odd-Order Multiplier - It is often necessary to multiply the
frequency of low noise oscillators without significantly degrading the phase noise
beyond the theoretical 20 log (N). Low noise frequency doublers constructed with
Schottky signal diodes are readily available but higher-order multipliers often.....
