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Unlocked PLL Retains Locked Frequency - 07/20/95 EDN-Design Ideas: Using the PC2
in-phase comparator output, the circuit in Fig 1 keeps the unlocked, or free-run,
frequency of a 74HC4046 PLL near the locked frequency. With no signal input, the VCO
output normally adjusts to its lowest frequency (one-half the locked frequency, f0).
In some applications, such a large frequency excursion may be undesirable. With the
addition of D1, R3, C2, R4, and the 74HC04 inverting buffer, the free-run frequency
remains near the locked frequency in the absence of a signal input.....(design idea
added 3/03) |