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Demodulator Circuits
Last Updated on: Saturday, June 27, 2009 04:42 PM

 

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Ber Meter is Easy to Build:  03/02/00 EDN-Design Ideas / (added 1/06) A bit-error-rate (BER) tester is a basictool for digital-communications measurements. Although many commercial BER testers are available, you can easily design and build an inexpensive version. The scheme in Figure 1 has performance similar to that of a commercial tester but requires you to perform a manual calculation based on displayed data. The tester displays received bits and received erroneous bits, and you must calculate the BER data using a handheld calculator, for example....

Circuit Yields Accurate Absolute Values:  07/05/01 EDN-Design Ideas / (added 1/05 The circuit in Figure 1 delivers the absolute value of the input signal with an accuracy better than 10 ppm of the full-scale range. The circuit has low zero-crossing error. You can use it as an asynchronous demodulator, as a source for logarithmic amplifiers, or simply as a demonstration of the wonders of feedback. The circuit uses two op amps; five identical resistors, R; one double-value resistor, 2R; and four thermally matched diodes. When the input, VIN, is positive, IC1's output is 2VIN+VD3 (the voltage drop across D3). D2 is reverse-biased, thus IC2 behaves as a voltage follower, yielding VOUT=R(VIC1-VD4)/2R. Because the same amount of current (VIN/R) flows in D3 and D4, assuming their characteristics are the same, VD3=VD4, and VOUT=VIN. When VIN is negative, IC1's output is 2VIN-VD1. D4 is reverse-biased, and IC2 is an inverting amplifier, yielding VOUT=R(VIC1+VD2)/2R. Again, the current flowing in D1 and D2 is VIN/R, and VOUT=-VIN. For good performance,...

Clock Recovery Scheme Suits Low Snr Systems:  06/05/00 EDN-Design Ideas / (Electronic circuit added 7/03) A clock-recovery architecture can operate with NRZ digital signals, even at low SNRs. A clock-recovery subsystem is based on a PLL comprising a phase comparator, a loop filter, and a voltage-controlled oscillator (VCO)....

Demodulator Schematic/Design:  The demodulator block diagram below has three major sections that were implemented in this iteration of the design, the mixer, the filter, and the phase shift network  (Electronic circuit added 7/03)

Inverted Bipolar Transistor Doubles as a Signal Clamp:  06/07/01EDN-Design Ideas / (Electronic circuit added 7/03) A number of circuits, such as level detectors and AM demodulators, benefit from a rectifier with a low offset voltage. Silicon diodes have an offset of approximately 0.6V and do not work well in low-level circuitry. A Schottky diode is a bit better...

Inverted Bipolar Transistor Doubles as a Signal Clamp:  11/09/00 EDN-Design Ideas / (Electronic circuit added 7/03) A number of circuits, such as level detectors and AM demodulators, benefit from a rectifier with a low offset voltage....

Novel Method Detects Lock in Costas Loops:  06/22/00 EDN-Design Ideas / (Electronic circuit added 7/03) In the well-established lock-detection scheme for conventional PLLs, the VCO or VCXO local oscillator splits the output into 0 and 90 signals ( Figure 1 ). The incoming IF signal mixes with the 0 and 90 signals to perform phase locking and lock detection,...

Self Modifying Code Extends Addressing Mode:  12/17/98 EDN-Design Ideas  / (added 07/05)   As just about any assembly-language programmer knows, self-modifying code (SMC) is usually undesirable, unintentional, and destructive. However, the SMC routine in Listing 1 is extremely useful to extend the indexed, 16-bit offset addressing mode of the venerable HC05 µC from 8 bits, or 256 locations, to the full 13-bit (8-kbyte) memory address space that the µC’s architecture supports. This routine is very useful for error tables, text messages tables, or any array manipulation for a large number of elements....

Simple Ber Meter is Easy to Build:  03/02/00 EDN-Design Ideas / (added 1/06) A bit-error-rate (BER) tester is a basictool for digital-communications measurements. Although many commercial BER testers are available, you can easily design and build an inexpensive version. The scheme in Figure 1 has performance similar to that of a commercial tester but requires you to perform a manual calculation based on displayed data. The tester displays received bits and received erroneous bits, and you must calculate the BER data using a handheld calculator, for example....

Single Sideband Demodulator Covers the Hf Band #1:  07/20/00 EDN-Design Ideas / (Electronic circuit added 7/03) The circuit in Figure 1 complements a previous Design Idea ( Reference 1 ). The modulator used a phasing network to split a low-frequency (audio) signal into in-phase and quadrature (orthogonal) components. The phasing network has an advantage over...

Single Sideband Demodulator Covers the Hf Band #2:  10/26/00 EDN-Design Ideas / (Electronic circuit added 7/03) The circuit in Figure 1 complements a previous Design Idea (" SSB modulator covers HF band ," EDN , Sept 30, 1999, pg 122). The modulator employs a phasing network to split a low-frequency audio signal into in-phase and quadrature (orthogonal) compo...

Spread Spectrum Method Identifies Audio Path:  04/13/00 EDN-Design Ideas / (added 8/04) An unusual method of audio spread spectrum can identify the audio path that's currently in use through a consumer-electronic device. The design in Figure 1a uses an injected audio spread-spectrum tag signal because a listener does not notice the low...


 
 
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