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Frequency Doubler
Circuits
Last Updated on:
Friday, March 23, 2012 10:59 AM
| Circuits Designed
by Dave Johnson, P.E. : |
- CIRCUIT
FORMS DIVIDE BY 1.5 COUNTER
Two inexpensive ICs divide a TTL clock signal by 1.5. By following the circuit with
another flip/flop, you could also generate a divide by
three function.
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Links to electronic circuits, electronic schematics, designs for engineers, hobbyists,
students & inventors: |
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74ACT74 makes low-skew clock divider - 12/17/98 Issue of EDN
Serial-data systems often generate an internal clock at twice the data
rate for mid-bit sampling or for generating bi-phase codes. External
equipment and some internal processes require a clock that runs at the
data rate. Simply dividing the twice-rate clock with a flip-flop generates
a data-rate clock that is skewed by one logic delay with respect to the
input. This delay can be a significant fraction of the bit period.
You can use specialized PLL-based low-skew divider chips.....Page includes
several designs. Scroll to find this one..... [Design Idea by JTom
Napier, Consultant, North Wales, PA] |
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Amplifiers perform precision divide by 2 circuit - 6-Mar-03
Issue of EDN The classic implementation of a voltage-halving circuit
uses two equal-value resistors. Using 1% resistors provides a divider
output with 2% accuracy. For most applications, this performance is
cost-effective andthan adequate. However, when you need extreme precision,
this approach requires correspondingly accurate resistors and can become
expensive..... [Design Idea by Glen Brisebois and Jon Munson, Linear
Technology Corp, Milpitas, CA] |
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Analog divider uses few components - 4-Jan-07 Issue of EDN
Low-cost op amp, CMOS timer perform analog math..... [Design Idea by David
Cripe, Chatham, IL; Edited by Brad Thompson and Fran Granville] |
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Charge-pump circuit divides by two - 02/18/99 Issue of EDN Small size
and efficiency approaching 100% make switched-capacitor charge pumps popular for
voltage doubling and inverting in miniature dc-dc applications. Few are aware,
however, that most charge pumps can halve as well as double or invert an input
voltage. The increasing adoption of low-voltage logic makes this ÷2 capability useful
for generating low-voltage supplies in portable.....Page includes several designs.
Scroll to find this one..... [Design Idea by Budge Ing, Maxim Integrated Products,
Sunnyvale, CA] |
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Cheap 40kHz Clock - ASCII format. This circuit has worked for me in
many applications. (it might be an idea to buffer the signal befor using it. (There
are still 5 unused gates in the 'C14) (electronic circuit added06/06/06) |
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Circuit Conditions Variable Duty Cycle Clock - 02/17/97 EDN-Design
Ideas.....David Albean, Thomson Consumer Electronics, Indianapolis, INA simple
enhancement of an earlier Design Idea ("Delay line implements clock doubler",EDN, July
18, 1996, pg 102) implements a variable-duty-cycle clock-signal conditioner. The
circuit accepts an input clock of any duty cycle and generates any desired duty cycle
at the output. You need to add only one flip-flop to the earlier design to generate an
arbitrary-duty-cycle output. You can use the circuit to correct a non-50% input to a
50% output or to create a non-50% output from any arbitrary input duty cycle.....
[Edited by Bill Travis & Anne Watson Swager] |
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Circuit divides frequency by N+1 - 11-Jul-02 Issue of EDN Digital
frequency dividers usually use flip-flop stages that connect the Q pin to the D
data-input pin of the following stage. This configuration creates a binary
waveform that you can feed back to the input. You can divide any integer lower than 2N
with minimal stages, where N is the number of stages..... [Design Idea by Bert
Erickson, Fayetteville, NY] |
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Circuit forms Divide by 1.5 Counter - Two inexpensive ICs divide a TTL clock
signal by 1.5. By following the circuit with another flip/flop, you could also
generate a divide by three function..... [Designed by David A. Johnson] |
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Clock divider - (circuit / schematic design added 6/06) |
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Counter Provides Divide by 45 Function - 05/22/97 EDN-Design Ideas..... EDN
is migrating links. This link is not verified. Search the "title" + "EDN" for
new link. |
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Divider with K193 IE2 - .... |
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Divider with K193 IE7 - .... |
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Divider with MB506 - .... |
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Divider with NEC506 - .... |
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Divider with SAB6456/ SDA2101 - .... |
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Divider with SP8695 - .... |
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Frequency Doubler Operates on Triangle Waves - 03/14/96 EDN-Design
Ideas..... EDN is migrating links. This link is not verified. Search the "title"
EDN for new link. |
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Precision divide-by-two
analog attenuator needs no external components - 17-Mar-05 Issue of EDN
Many modern A/D converters offer only a 5V input range, and using these converters
with a 65V or larger input signal gives the designer a problem how to discard
half of a good analog signal without introducing errors and distortion. To solve the
problem, you can use an attenuator comprising two operational amplifiers and two
resistors (Figure 1]..... [Design Idea by Moshe Gerstanhaber and Chau Tran, Analog
Devices, Wilmington, MA; Edited by Brad Thompson] |
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Synthesize Optimal Digital Frequency Dividers - 05/13/99 EDN-Design
Ideas.....For many applications, you need to divide a reference clock into one or more
subclocks to use in different parts of the system. Sometimes,.....PDF contains many
circuits, scroll to find this one.… [Design Idea by Lindo St Angel, PrairieComm Inc,
Arlington Heights, IL] |
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Unusual Frequency Dividers - (electronic circuit added 7/03) |
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