Phased Locked Loop (PLL) Electronic Circuits

Phased Locked Loop (PLL) Circuits, Page 4
PLL's: #'s - A B - O P Q - Z
Last Updated on: Monday, October 26, 2009 05:03 AM

Links to electronic circuits, electronic schematics, designs for engineers, hobbyists, students & inventors:

Phase Locked Loop Based Clock Generators - National Semiconductor Application Note 04-Nov-1995 (app note added 4/02)

Phase locked loop fundamentals - Application Note MiniCircuits.com (app note added 04/05/06)

Phase Locked Loop IC as a Communication System Building Block - National Semiconductor Application Note 04-Nov-1995 (app note added 4/02)

Phase sequence indicator uses few passive components - 07/09/06 EDN-Design Ideas: Debug three-phase power-line wiring with this easily constructed circuit.....(design idea added 09/06)

Phased Lock Loop Schematic - (electronic circuit added 7/03)

Phase-Locked Loop Based Clock Generators - National Semiconductor Application Note (app note added 2/06)

PLL based converter controls light source - 07/02/98 EDN-Design Ideas: Using the circuit in Figure 1, you can digitally control the light intensity of a lamp. The control loop is based on a PLL, in which the VCO comprises a light-to-frequency converter (TSL220)coupled to a light source that derives its drive from a switching regulator (L4970A)The output.....(design idea added 6/06)

PLL block schematics - (electronic circuit added 6/07)

PLL FM Transceiver - TA8122N and PIC16F84 based FM PLL Transceiver (circuit added 08/07/06)

Pll Forms Simple MSK Demodulator - 12/17/98 EDN-Design Ideas: In minimum-shift-keying (MSK)signaling, two frequencies that differ by the bit rate represent a one bit and a zero bit. Normally, the frequency shift occurs at the peak of a cycle, so that neither the amplitude nor the slope of the waveform shows a discontinuity.....(design idea added 2/06)

PLL IC forms simple Digital phase shifter - 01/04/96 EDN-Design Ideas: (design idea added 2/06)

PLL implements FPGA based SDRAM Controller - 05/21/98 EDN-Design Ideas: As FPGA capabilities increase and time to market decreases, FPGAs gain more acceptance for implementing both data and control paths. Thus, they find wide use as controllers and datapath glue logic for fast-page DRAMs. Synchronous DRAMs (SDRAMs),.....(design idea added 6/06)

PLL Jitter & Its Effects in the CAN Protocol - Microchip Application Note Published 15-Jun-04 (app note added 2/06)

PLL Module - This schematic originally comes from a Dutch magazine called Free Radio Magazine in the mid eighties. It's just a PLL nothing more, nothing less. The resistor named R can be replaced by a 50 Ohm type if the power supply is 5 Volts. The dividing ratio can be programed with IC2. For the ratios see table 1. Example: If the input signal has a frequency of 10MHz, the crystal frequency output is 10.240-10.000=0.24. Now looking at table 1, we see we can make 24 by combining the 8 and 16 program switches (pin 11 and pin 12 closed to Vcc). ….(circuit design added 11/08)

PLL Oscillator - This PLL was first published in March 1983 in Free Radio Magazine and was re-published a year later in the same magazine. It uses the well known 4046 as PLL and a CD4059 as programmable divider. ….(design added 11/08)

PLL synchronizes power supply IC - 07/16/98 EDN-Design Ideas: hIt is often desirable to synchronize a switching power supply to a system clock or to a second supply. If the power-supply controller has no synchronization pin, you can add a low-value resistor in series with the oscillator capacitor, thereby developing a synchronization .....(design idea added 2/06)

PLL Synthesis - National Semiconductor Application Note 04-Nov-1995 (app note added 4/02)

PLL Synthesizing Oscillator 1 - (electronic circuit added 7/03)

PLL Synthesizing Oscillator 2 - (electronic circuit added 7/03)

PLL Synthesizing Oscillator 3 - (electronic circuit added 7/03)

PLL Tuning Module - SAA1057 Dual-speed PLL designed for wideband FM transmitter. ….(electronic schematic added 11/08)

PLL Tutorial - (Tony van Roon's electronic design / schematic added 2/06)

PLL using a TA7310P - The resistor named R can be replaced by a 50 Ohm type if the power supply is 5 Volts. The dividing ratio can be programed with IC2. For the ratios see table 1. Example: If the input signal has a frequency of 10MHz, the crystal frequency output is 10.240-10.000=0.24. Now looking at table 1, we see we can make 24 by combining the 8 and 16 program switches (pin 11 and pin 12 closed to Vcc). By trimming coil T the output will lock to 10MHz. To use this PLL in the 3 meter band (100MHz), divide the oscillator frequency by 10. Next feed this signal to pin 4 from IC1 by a 8pF capacitor. The adjust voltage coming from IC2 pin 5 should be connected to the oscillator's varicap by a 4k7 resistor. As described here, the PLL will make frequency stepping of 10kHz, to change it to 5kHz apply around minus 9V to pin 4 from IC2. When using this PLL in the 3 meter band, this will result in stepping of 50kHz instead of 100kHz. ….(electronic schematic added 11/08)

PLL with IC HEF4059 - (electronic circuit added 6/07)

Precautions for Disk Data Separator PLL Designs - National Semiconductor Application Note (app note added 2/06)

PLL's: #'s - A B - O P Q - Z