|
Sync Circuits
#'s - M N -
Z
Last Updated on:
Friday, June 04, 2021 01:53 PM |
|
|
Circuits Designed by Dave Johnson, P.E. |
|
|
|
|
Links to electronic circuits, electronic schematics and designs for engineers,
hobbyists, students & inventors:
|
|
|
|
Single Gate Synchronizes Clock - 10/27/94 EDN-Design Ideas....The
deceptively simple circuit in Fig 1 harbors formidable power. Consider when
you have a data-clock input to your system for an existing serial data
stream. Then, your system people surprise you.... [Design Idea by Phil
Harvey, Technology Integration Inc., Bedford, MA] |
|
Solid-state Relay Saves Battery's Life - 09/01/94 EDN-Design
Ideas....The circuit in Fig 1 uses a low-resistance p-channel FET, Q4, to
disconnect a load from the battery when the battery's voltage drops below a
certain value. After you disconnect the circuit, it remains off until you
remove and replace the battery.... [Design Idea by Tom Gay, Siemens,
Regensburg, Germany] |
| |
|
|
|
Sync Tip Clamping - 10/08/98 EDN-Design Idea In digital sync-tip
clamping, a stand-alone "clamping" ADC (CADC] incorporates the dc-restore function at
its input and eliminates the need for external timing strobes. This technique
encompasses a complete front-end architecture, including sync detection and automatic
gain control (AGC] and provides.... [Design Idea by Lazar Shifrin, Advanced Imaging
Solutions] |
|
|
|
|
|
Synchronized Timing Generators - Circuit Ideas for Designers Application
Notes Advanced Linear Devices, Inc....[App Note] |
|
Synchronized Window Comparator Eliminates Error - 05/11/95 EDN-Design
Ideas....Precision A/D converters need a window comparator. The window comparator in
Fig 1a is synchronized to the clock signal. This synchronization eliminates
errors that could arise when the input signal crosses the high or low threshold (Fig
1b]unsynchronized to clock. In operation, comparator IC1A sets flip-flop IC2....
[Design Idea by Sergey Velichko, Consultant, Bosie, ID] |
|
Synchronizing Controller detects baud rate - 03/02/98 EDN-Design Ideas....A
simple and inexpensive implementation using an eight-pin 12C508 controller (Microchip
Technology, Chandler, AZ] provides both bit-rate detection and a synchronous,
appended-clock output from an asynchronous input-data stream (Figure 1a].…File
contains many circuits, please scroll to find this one.... [Design Idea by William
Grill, Riverhead Systems, Littleton, CO] |
|
Synchronizing Multiple AD9850/AD9851 DDS-Based Synthesizers - AN-587-Analog
Device Application Notes....[App Note] |
|
Synchronizing Multiple AD9852 DDS-Based Synthesizers - AN-605-Analog Device
Application Notes....[App Note] |
|
Synchronous buck circuit produces negative voltage - 6-Mar-03 Issue of EDN
Many electronic systems require both positive and negative voltages to operate
properly. Generating an efficient, low-voltage positive output from a higher voltage
input typically entails the use of a synchronous buck regulator. But when generating a
negative output voltage from a positive input voltage, you'd typically use a flyback
topology, especially at higher output currents.... [Design Idea by John Betten, Texas
Instruments, Dallas, TX] |
|
Synchronous flyback circuit provides high-efficiency conversion - 22-Jul-04
Issue of EDN Buck regulators are usually the first choice when you design
nonisolated step-down regulators unless the ratio of VIN to VOUT is greater than 10,
the input voltage is high, or both. Low duty cycle can be problematic for FET drivers
and cause current-mode control loops to lose control. Efficiency can fall dramatically
to 60 to 70% at low VOUT and current of only a few amps.... [Design Idea by Wayne
Rewinkel, National Semiconductor, Phoenix, AZ] |
|
Synchronous oscillator converts audio video to FM - 07/22/99 EDN-Design
Ideas....The synchronous oscillator (SO) and the coherent phase-locked synchronous
oscillator (CPSO) are universal multifunctional networks that track, synchronize, and
amplify as much as 80 dB; improve SNR by as much as 70 dB; and modulate AM, FM, and
FSK signals.... [Design Idea by Vasil Uzunoglu, Synchtrack, Gaithersburg, MD]
|
|
Synthesize Optimal Digital Frequency Dividers - 05/13/99 EDN-Design
Ideas....For many applications, you need to divide a reference clock into one or more
subclocks to use in different parts of the system. Sometimes,....PDF contains many
circuits, scroll to find this one.…[Lindo St Angel, PrairieComm Inc, Arlington
Heights, IL] [Design Idea by Lindo St Angel, PrairieComm Inc, Arlington Heights, IL] |
|
TV/Radio Antenna Cable galvanic isolator - A ground loop in your AV system
caused by antenna connection or TV cable is very common if you have your computer
connected to the same system. This type of ground loop problem can be solved by
using suitable isolation between your AV system and the antenna cable. The simplest
way to get rid of the hum is to disconnect the antenna cable from the AV system. If
you still want to watch cabe TV or listen to your radio an keep the system hum free
then you have to install isolators to all those antenna cable connections your system
has.... [Circuit design by Tomi Engdahl] |
| Two AA cells power step-down regulator -
01/07/99 Issue of EDN DC/DC conversion is particularly challenging when both the
input and output voltages are low. Step-up ICs that operate with inputs lower than 1V
are available, but step-down ICs that accept input voltages....Page includes several
designs. Scroll to find this one.... [Design Idea by Len Sherman, Maxim
Integrated Products, Sunnyvale, CA] |
|
Video Amplifier with Sync Stripper & PC Restore - This document is an
application note of200 MHz video amplifier, sync stripper and DC restorer in PDF
format. (app note added 5/02) |
|
Video Difference Amplifier Brings Versatility to Low Voltage Applications -
DN343 Design Notes (Linear Technology) (app note added 1/06) |
|
|
|
