|
Gate Array Circuits
Page 1
Gate Arrays: #'s - B,
C, D - I,
J - P, Q - U,
V - Z
Last Updated on:
Friday, March 23, 2012 12:47 PM |
|
|
Links to electronic circuits,
electronic schematics, designs for engineers, hobbyists, students & inventors:
|
|
|
|
2 Gates Expand ASIC's Memory Decoding Range - 03/29/01
EDN-Design Ideas.....Many electronic circuits implement chip-select lines
on an ASIC. From beginning of design cycle, chip
selects, CS0 to CS4, have defined bases on memory map (Figure 1].
Adding functions..... [Design Idea by Vinh Hoang, Ericsson Inc, Brea, CA] |
|
2 wires control SPI high-speed ADC - 10-Nov-05 Issue of EDN
Inverters substitute for an SPI ADC's chip-select line..... [Design Idea
by Dan Meeks, Texas Instruments Inc, Austin, TX; Edited by Brad Thompson
and Fran Granville] |
|
Accessing multiple FIFOs in your FPGA design - (added 5/08)
|
|
Accessing SDRAM in your FPGA design - (added 5/08) |
|
Add a Schmitt-trigger function to CPLDs, FPGAs, and applications -
13-Oct-05 Issue of EDN For slow-slewing signals, hysteresis solves
trigger problem..... [Design Idea by Stephan Roche, Santa Rosa, CA; Edited
by Brad Thompson and Fran Granville] |
|
|
|
AN-1126: BGA Ball Grid Array - National Semiconductor Application Note
(app note added 2/06) |
|
AN-1327: Simplified Programming of Altera FPGA's using a Scansta111/112 Scan Chain Mux
- National Semiconductor Application Note (app note added 2/06)
|
|
AN-1376: External Serial Interface Reduces Simultaneous Switching Output Noise in
FPGAs - National Semiconductor Application Note.....[App Note] |
|
Audio Project - for XSV Board (Univ. of Queensland) (added 4/02)
|
|
Audio Volume Indicator - uses an XS40 Board and XStend Board to display
volume of an audio input on a barograph LED. (added 4/02) |
|
BGA Ball Grid Array - National Semiconductor Application Note
(app note added 2/06) |
|
Building Wireless Communications & BroADCast Systems with the HERON Range -
Wireless communications is being revolutionised by new high performance signal
processing systems. Many system building blocks can now be built using digital
technology, bringing new levels of manufacturability, reliability and performance –
usually at reduced cost.....(added 5/08) |
|
|
|
| |
| Gate Arrays:
#'s - B, C,
D - I, J - P,
Q - U,
V - Z |
|
|
